Invention Grant
US08148806B2 Multiple chips bonded to packaging structure with low noise and multiple selectable functions
有权
多个芯片结合到具有低噪声和多种可选功能的封装结构
- Patent Title: Multiple chips bonded to packaging structure with low noise and multiple selectable functions
- Patent Title (中): 多个芯片结合到具有低噪声和多种可选功能的封装结构
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Application No.: US12269053Application Date: 2008-11-12
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Publication No.: US08148806B2Publication Date: 2012-04-03
- Inventor: Mou-Shiung Lin , Bryan Peng
- Applicant: Mou-Shiung Lin , Bryan Peng
- Applicant Address: TW Hsinchu
- Assignee: Megica Corporation
- Current Assignee: Megica Corporation
- Current Assignee Address: TW Hsinchu
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L25/065 ; H05K1/02 ; H05K1/14 ; H05K1/00
Abstract:
The package includes a substrate, a first chip, a second chip, multiple first bumps and multiple second bumps. The substrate has a first region and a second region. The first region is substantially coplanar with the second region. The first bumps connect the first chip and the second chip. The second bumps connect the first chip and the second region of the substrate, wherein the second chip is over the first region of the substrate. The second bumps have a height greater than that of the first bumps plus the second chip. The substrate does not have an opening accommodating the second chip. The first bumps may be gold bumps or solder bumps. The second bumps may be solder bumps.
Public/Granted literature
- US20090057919A1 Multiple chips bonded to packaging structure with low noise and multiple selectable functions Public/Granted day:2009-03-05
Information query
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