Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US12538635Application Date: 2009-08-10
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Publication No.: US08148788B2Publication Date: 2012-04-03
- Inventor: Akira Suzuki , Naofumi Tsuchiya , Koujiro Kameyama
- Applicant: Akira Suzuki , Naofumi Tsuchiya , Koujiro Kameyama
- Applicant Address: JP Ora-gun JP Ojiya-shi US AZ Phoenix
- Assignee: SANYO Semiconductor Co., Ltd.,SANYO Semiconductor Manufacturing Co., Ltd.,Semiconductor Components Industries, LLC
- Current Assignee: SANYO Semiconductor Co., Ltd.,SANYO Semiconductor Manufacturing Co., Ltd.,Semiconductor Components Industries, LLC
- Current Assignee Address: JP Ora-gun JP Ojiya-shi US AZ Phoenix
- Agency: Morrison & Foerster LLP
- Priority: JP2008-227180 20080904
- Main IPC: H01L21/762
- IPC: H01L21/762

Abstract:
The invention is directed to reduction of a manufacturing cost and enhancement of a breakdown voltage of a PN junction portion abutting on a guard ring. An N− type semiconductor layer is formed on a front surface of a semiconductor substrate, and a P type semiconductor layer is formed thereon. An insulation film is formed on the P type semiconductor layer. Then, a plurality of grooves, i.e., a first groove, a second groove and a third groove are formed from the insulation film to the middle of the N− type semiconductor layer in the thickness direction thereof. The plurality of grooves is formed so that one of the two grooves next to each other among these, that is closer to an electronic device, i.e., to an anode electrode, is formed shallower than the other located on the outside of the one. Then, an insulating material is deposited in the first groove, the second groove and the third groove. The lamination body of the semiconductor substrate and the layers laminated thereon is then diced along dicing lines.
Public/Granted literature
- US20100052090A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2010-03-04
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