Invention Grant
- Patent Title: Semiconductor device, and its manufacturing method
- Patent Title (中): 半导体器件及其制造方法
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Application No.: US12447113Application Date: 2007-10-23
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Publication No.: US08148757B2Publication Date: 2012-04-03
- Inventor: Masayuki Terai , Shinji Fujieda , Akio Toda
- Applicant: Masayuki Terai , Shinji Fujieda , Akio Toda
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- Priority: JP2006-289457 20061025
- International Application: PCT/JP2007/070666 WO 20071023
- International Announcement: WO2008/050775 WO 20080502
- Main IPC: H01L29/04
- IPC: H01L29/04 ; H01L29/92
Abstract:
A channel is formed at a recessed portion or a projecting portion of a substrate, and a gate insulating film is formed so as to have first to third insulating regions along the channel. Each of the gate insulating films of the first and third insulating regions has a first gate insulating film containing no electric charge trap formed on a plane different from a principal surface of the substrate, an electric charge accumulating film containing an electric charge trap, and a second gate insulating film containing no electric charge trap. The gate insulating film of the second insulating region at the middle is formed on a plane parallel to the principal surface of the substrate and is composed of only a third gate insulating film containing no electric charge trap.
Public/Granted literature
- US20100090257A1 SEMICONDUCTOR DEVICE, AND ITS MANUFACTURING METHOD Public/Granted day:2010-04-15
Information query
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