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US08148263B2 Methods for forming conductive vias in semiconductor device components 有权
在半导体器件部件中形成导电通孔的方法

Methods for forming conductive vias in semiconductor device components
Abstract:
A method for forming conductive vias in a substrate of a semiconductor device component includes forming one or more holes, or apertures or cavities, in the substrate so as to extend only partially through the substrate. A barrier layer, such as an insulative layer, may be formed on surfaces of each hole. Surfaces within each hole may be coated with a seed layer, which facilitates adhesion of conductive material within each hole. Conductive material is introduced into each hole. Introduction of the conductive material may be effected by deposition or plating. Alternatively, conductive material in the form of solder may be introduced into each hole.
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