Invention Grant
- Patent Title: Method of fabricating semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US13009251Application Date: 2011-01-19
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Publication No.: US08148226B2Publication Date: 2012-04-03
- Inventor: Mayumi Shibata
- Applicant: Mayumi Shibata
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Volentine & Whitt, PLLC
- Priority: JP2010-035402 20100219
- Main IPC: H01L21/8236
- IPC: H01L21/8236

Abstract:
Disclosed is a method of fabricating a semiconductor device that includes both an enhancement-mode FET and a depletion-mode FET. The method includes forming an opening in a gate electrode for the depletion-mode FET. The opening is located in or in the vicinity of one of the overlapping regions in which the gate electrode extends over active regions. The method further includes ion-implanting dopant impurities into the active regions at an oblique angle using the gate electrode as a mask, thereby to form the doped region that is located under the opening and continuously extending from one of the opposite sides of the gate electrode to the other.
Public/Granted literature
- US20110207278A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE Public/Granted day:2011-08-25
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