Invention Grant
- Patent Title: Method of manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US12567050Application Date: 2009-09-25
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Publication No.: US08133788B2Publication Date: 2012-03-13
- Inventor: Yasuyuki Sayama , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Kazunari Kushiyama
- Applicant: Yasuyuki Sayama , Tetsuya Okada , Makoto Oikawa , Hiroyasu Ishida , Kazunari Kushiyama
- Applicant Address: US AZ Phoenix
- Assignee: Semiconductor Components Industries, LLC
- Current Assignee: Semiconductor Components Industries, LLC
- Current Assignee Address: US AZ Phoenix
- Agency: Morrison & Foerster LLP
- Priority: JP2005-077570 20050317; JP2006-048729 20060224
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
An n type impurity region is provided below a gate electrode. By setting a gate length to be less than a depth of a channel region, a side surface of the channel region and a side surface of the n type impurity region adjacent to the channel region form a substantially perpendicular junction surface. Thus, since a depletion layer widens uniformly in a depth direction of a substrate, it is possible to secure a predetermined breakdown voltage. Furthermore, since an interval between the channel regions, above which the gate electrode is disposed, is uniform from its surface to its bottom, it is possible to increase an impurity concentration of the n type impurity region, resulting in an achievement of a low on-resistance.
Public/Granted literature
- US20100015772A1 METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2010-01-21
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