Invention Grant
- Patent Title: Analyzing device for circuit device, circuit device analyzing method, analyzing program, and electronic medium
- Patent Title (中): 分析电路设备,电路设备分析方法,分析程序和电子介质
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Application No.: US12374353Application Date: 2007-12-27
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Publication No.: US08132140B2Publication Date: 2012-03-06
- Inventor: Kazuhide Uriu , Toru Yamada , Masahiro Yamaoka
- Applicant: Kazuhide Uriu , Toru Yamada , Masahiro Yamaoka
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Pearne & Gordon LLP
- Priority: JP2007-005609 20070115; JP2007-005610 20070115
- International Application: PCT/JP2007/075215 WO 20071227
- International Announcement: WO2008/087849 WO 20080724
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A circuit board analyzing method and a circuit board analyzer are provided which can greatly reduce analyzing time. The circuit board analyzer includes a computing unit 110, a memory unit 140 connected to the computing unit 110, and an input unit 160 connected to the computing unit 110. The computing unit 110 includes a wiring data acquiring section 310 acquiring data of wirings formed on a circuit board, a basic circuit diagram forming section 320 dividing the wirings into meshes and setting cells and branches connecting the adjacent cells, and an interference analysis setting section 330 setting an element ignoring range of elements set in the cells and the branches.
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