Invention Grant
US08131944B2 Using criticality information to route cache coherency communications
有权
使用关键性信息来路由缓存一致性通信
- Patent Title: Using criticality information to route cache coherency communications
- Patent Title (中): 使用关键性信息来路由缓存一致性通信
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Application No.: US12156343Application Date: 2008-05-30
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Publication No.: US08131944B2Publication Date: 2012-03-06
- Inventor: Zhen Fang , Liqun Cheng , Sriram R. Vangal
- Applicant: Zhen Fang , Liqun Cheng , Sriram R. Vangal
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: G06F12/00
- IPC: G06F12/00
Abstract:
In one embodiment, the present invention includes a method for receiving a cache coherency message in an interconnect router from a caching agent, mapping the message to a criticality level according to a predetermined mapping, and appending the criticality level to each flow control unit of the message, which can be transmitted from the interconnect router based at least in part on the criticality level. Other embodiments are described and claimed.
Public/Granted literature
- US20090300292A1 Using criticality information to route cache coherency communications Public/Granted day:2009-12-03
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