Invention Grant
- Patent Title: Methods and apparatuses to support memory transactions using partial physical addresses
- Patent Title (中): 使用部分物理地址支持内存事务的方法和设备
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Application No.: US11694999Application Date: 2007-03-31
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Publication No.: US08131940B2Publication Date: 2012-03-06
- Inventor: Krishnakanth Sistia , Yen-Cheng Liu
- Applicant: Krishnakanth Sistia , Yen-Cheng Liu
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schubert Law Group PLLC
- Main IPC: G06F13/14
- IPC: G06F13/14 ; G06F12/16

Abstract:
Methods and apparatuses to support memory transactions using partial physical addresses are disclosed. Method embodiments generally comprise home agents monitoring multiple responses to multiple memory requests, wherein at least one of the responses has a partial address for a memory line, resolving conflicts for the memory requests, and suspending conflict resolution for the memory requests which match partial address responses until determining the full address. Apparatus embodiments generally comprise a home agent having a response monitor and a conflict resolver. The response monitor may observe a snoop response of a memory agent, wherein the snoop response only has a partial address and is for a memory line of a memory agent. The conflict resolver may suspend conflict resolution for memory transactions that match the partial address of the memory line until the conflict resolver receives a full address for the memory line.
Public/Granted literature
- US20080244195A1 METHODS AND APPARATUSES TO SUPPORT MEMORY TRANSACTIONS USING PARTIAL PHYSICAL ADDRESSES Public/Granted day:2008-10-02
Information query