Invention Grant
US08130888B2 Calibrating a phase detector and analog-to-digital converter offset and gain
有权
校准相位检测器和模数转换器的偏移和增益
- Patent Title: Calibrating a phase detector and analog-to-digital converter offset and gain
- Patent Title (中): 校准相位检测器和模数转换器的偏移和增益
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Application No.: US12562360Application Date: 2009-09-18
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Publication No.: US08130888B2Publication Date: 2012-03-06
- Inventor: Adam B. Eldredge , Jeffrey S. Batchelor , Gary Hammes
- Applicant: Adam B. Eldredge , Jeffrey S. Batchelor , Gary Hammes
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Trop, Pruner & Hu, P.C.
- Main IPC: H04L7/00
- IPC: H04L7/00

Abstract:
The present invention includes apparatus and methods to calibrate a phase detector and an analog-to-digital converter (ADC) offset and gain. In one such embodiment, an apparatus includes a phase detector to generate an error pulse and a reference pulse, a combiner to combine the pulses, and an ADC to receive the combined pulses, where the ADC has a full scale set by an average of the reference pulse. Still further, a calibration loop may be coupled between the output of the ADC and the phase detector to generate and provide a phase adjust signal to reduce or eliminate phase offsets. Other embodiments are described and claimed.
Public/Granted literature
- US20100008459A1 Calibrating A Phase Detector And Analog-To-Digital Converter Offset And Gain Public/Granted day:2010-01-14
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