A semiconductor device includes a substrate portion including a plurality of diffusion regions defined in a non-symmetrical manner relative to a virtual bisecting line. A gate electrode level region above the substrate portion includes a number of conductive features that extend in only a first parallel direction. Adjacent conductive features that share a common line of extent in the first parallel direction are fabricated from respective originating layout features separated by an equal and minimal sized end-to-end spacing. Conductive features are defined along at least four different virtual lines of extent in the first parallel direction. A width of the conductive features within a photolithographic interaction radius is less than a wavelength of light of 193 nanometers as used in a photolithography process for their fabrication. The photolithographic interaction radius is five times the wavelength of light used in the photolithography process.