Invention Grant
- Patent Title: Power lead-on-chip ball grid array package
- Patent Title (中): 电源引导片上球栅阵列封装
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Application No.: US12599625Application Date: 2007-05-10
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Publication No.: US08129226B2Publication Date: 2012-03-06
- Inventor: James P. Johnston , Chu-Chung Lee , Tu-Anh N. Tran , James W. Miller , Kevin J. Hess
- Applicant: James P. Johnston , Chu-Chung Lee , Tu-Anh N. Tran , James W. Miller , Kevin J. Hess
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- International Application: PCT/IB2007/052711 WO 20070510
- International Announcement: WO2008/139273 WO 20081120
- Main IPC: H01L21/44
- IPC: H01L21/44
Abstract:
A packaging assembly (30), such as a ball grid array package, is formed which distributes power across an interior region of an integrated circuit die (52) by using an encapsulated patterned leadframe conductor (59) that is disposed over the die (52) and bonded to a plurality of bonding pads (45) formed in a BGA carrier substrate (42) and in the interior die region, thereby electrically coupling the interior die region to an externally provided reference voltage.
Public/Granted literature
- US20100270663A1 Power Lead-on-Chip Ball Grid Array Package Public/Granted day:2010-10-28
Information query
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