Invention Grant
US08122420B1 Congestion elimination using adaptive cost schedule to route signals within an integrated circuit 有权
拥塞消除使用自适应成本计划来路由集成电路内的信号

  • Patent Title: Congestion elimination using adaptive cost schedule to route signals within an integrated circuit
  • Patent Title (中): 拥塞消除使用自适应成本计划来路由集成电路内的信号
  • Application No.: US12489302
    Application Date: 2009-06-22
  • Publication No.: US08122420B1
    Publication Date: 2012-02-21
  • Inventor: Parivallal KannanSanjeev Kwatra
  • Applicant: Parivallal KannanSanjeev Kwatra
  • Applicant Address: US CA San Jose
  • Assignee: Xilinx, Inc.
  • Current Assignee: Xilinx, Inc.
  • Current Assignee Address: US CA San Jose
  • Agent Kevin T. Cuenot; Lois D. Cartier
  • Main IPC: G06F17/50
  • IPC: G06F17/50
Congestion elimination using adaptive cost schedule to route signals within an integrated circuit
Abstract:
A computer-implemented method of routing a circuit design for a target integrated circuit (IC) can include determining a characterization of routing congestion of the circuit design within the target IC and determining a first order cost component of using routing resources of the target IC according to the characterization. The method can include determining a higher order cost component of using routing resources of the target IC according to the characterization and assigning signals of the circuit design to routing resources according to costs calculated using the first order cost component and the higher order cost component. Signal assignments of the circuit design can be output.
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