Invention Grant
US08121182B2 High performance equalizer with enhanced DFE having reduced complexity
有权
具有增强型DFE的高性能均衡器具有降低的复杂性
- Patent Title: High performance equalizer with enhanced DFE having reduced complexity
- Patent Title (中): 具有增强型DFE的高性能均衡器具有降低的复杂性
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Application No.: US11608998Application Date: 2006-12-11
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Publication No.: US08121182B2Publication Date: 2012-02-21
- Inventor: Steve A. Allpress , Quinn Li
- Applicant: Steve A. Allpress , Quinn Li
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Thomas, Kayden, Horstemeyer & Risley, LLP
- Main IPC: H03K5/159
- IPC: H03K5/159 ; H04B14/06

Abstract:
An apparatus and method for implementing an equalizer which (1) combines the benefits of a decision feedback equalizer (DFE) with a maximum-a-posterori (MAP) equalizer (or a maximum likelihood sequence estimator, MLSE) (2) performs equalization in a time-forward or time-reversed manner based on the channel being minimum-phase or maximum-phase to provide an equalization device with significantly lower complexity than a full-state MAP device, but which still provides improved performance over a conventional DFE. The equalizer architecture includes two DFE-like structures, followed by a MAP equalizer. The first DFE forms tentative symbol decisions. The second DFE is used thereafter to truncate the channel response to a desired memory of L1 symbols, which is less than the total delay spread of L symbols of the channel. The MAP equalizer operates over a channel with memory of L1 symbols (where L1
Public/Granted literature
- US20070140330A1 HIGH PERFORMANCE EQUALIZER WITH ENHANCED DFE HAVING REDUCED COMPLEXITY Public/Granted day:2007-06-21
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