Invention Grant
- Patent Title: Delay locked loop circuit for preventing failure of coarse locking
- Patent Title (中): 延迟锁定环电路,防止粗锁的故障
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Application No.: US12659057Application Date: 2010-02-24
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Publication No.: US08120988B2Publication Date: 2012-02-21
- Inventor: Kyoung-Tae Kang , In-Dal Song
- Applicant: Kyoung-Tae Kang , In-Dal Song
- Applicant Address: KR Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Gyeonggi-do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2009-0016008 20090225
- Main IPC: G11C8/18
- IPC: G11C8/18

Abstract:
A delay locked loop circuit includes a delay locked loop receiving an external clock, a frequency detector delaying an input frequency signal to generate a plurality of strobe signals and outputting a check signal indicating that the frequency of the input frequency signal is equal to or lower than a reference frequency when all of the strobe signals are positioned within a first-status section of one cycle of the input frequency signal, a delay lock reset unit generating a reset signal to reset the frequency detector and an activation signal to enable the delay locked loop to perform a delay lock process, and a direct phase detector controlling a coarse locking window on the basis of the check signal and generating a pair of phase detection signals indicating logic levels of the external clock. According to this configuration, since the coarse locking window is controlled as per a frequency band, it is possible to prevent a failure of a coarse locking and to achieve an improved circuit performance.
Public/Granted literature
- US20100214858A1 Delay locked loop circuit for preventing failure of coarse locking Public/Granted day:2010-08-26
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