Invention Grant
US08120072B2 JFET devices with increased barrier height and methods of making same
有权
具有增加势垒高度的JFET器件及其制造方法
- Patent Title: JFET devices with increased barrier height and methods of making same
- Patent Title (中): 具有增加势垒高度的JFET器件及其制造方法
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Application No.: US12179299Application Date: 2008-07-24
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Publication No.: US08120072B2Publication Date: 2012-02-21
- Inventor: Chandra Mouli
- Applicant: Chandra Mouli
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder
- Main IPC: H01L29/812
- IPC: H01L29/812
Abstract:
Devices and methods for providing JFET transistors with improved operating characteristics are provided. Specifically, one or more embodiments of the present invention relate to JFET transistors with a higher diode turn-on voltage. For example, one or more embodiments include a JFET with a doped silicon-carbide gate, while other embodiments include a JFET with a metal gate. One or more embodiments also relate to systems and devices in which the improved JFET may be employed, as well as methods of manufacturing the improved JFET.
Public/Granted literature
- US20100019249A1 JFET Devices with Increased Barrier Height and Methods of Making Same Public/Granted day:2010-01-28
Information query
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