Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
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Application No.: US12501801Application Date: 2009-07-13
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Publication No.: US08120039B2Publication Date: 2012-02-21
- Inventor: Koji Ono , Hideomi Suzawa , Tatsuya Arao
- Applicant: Koji Ono , Hideomi Suzawa , Tatsuya Arao
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP11-330174 19991119
- Main IPC: H01L27/14
- IPC: H01L27/14

Abstract:
In a semiconductor device, typically an active matrix display device, the structure of TFTs arranged in the respective circuits are made suitable in accordance with the function of the circuit, and along with improving the operating characteristics and the reliability of the semiconductor device, the manufacturing cost is reduced and the yield is increased by reducing the number of process steps. A semiconductor device has a semiconductor layer, an insulating film formed contacting the semiconductor layer, and a gate electrode having a tapered portion on the insulating film, in the semiconductor device, the semiconductor layer has a channel forming region, a first impurity region for forming a source region or a drain region and containing a single conductivity type impurity element, and a second impurity region for forming an LDD region contacting the channel forming region, a portion of the second impurity region is formed overlapping a gate electrode, and the concentration of the single conductivity type impurity element contained in the second impurity region becomes larger with distance from the channel forming region.
Public/Granted literature
- US20100006854A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2010-01-14
Information query
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