Invention Grant
US08094769B2 Phase-locked loop system with a phase-error spreading circuit 有权
具有相位误差扩展电路的锁相环系统

Phase-locked loop system with a phase-error spreading circuit
Abstract:
A phase-locked loop (PLL) system including a phase-frequency detector for generating an up signal or a down signal based on a phase difference between a reference clock and a feedback clock is provided. The PLL system further includes a phase-error spreading circuit for generating phase-spread pulses based on a relationship between a first time attribute of the up signal or the down signal and a second time attribute of the phase-spread pulses. The PLL system further includes a voltage-controlled oscillator (VCO) for generating a VCO clock based on the phase-spread pulses. The PLL system may also include a charge pump that generates a pumping signal based on the phase-spread pulses.
Public/Granted literature
Information query
Patent Agency Ranking
0/0