Invention Grant
US08089622B2 Device and method for evaluating defects in the edge area of a wafer and use of the device in inspection system for wafers
有权
用于评估晶片边缘区域中的缺陷并在晶片检查系统中使用该装置的装置和方法
- Patent Title: Device and method for evaluating defects in the edge area of a wafer and use of the device in inspection system for wafers
- Patent Title (中): 用于评估晶片边缘区域中的缺陷并在晶片检查系统中使用该装置的装置和方法
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Application No.: US12039047Application Date: 2008-02-28
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Publication No.: US08089622B2Publication Date: 2012-01-03
- Inventor: Andreas Birkner , Michael Hofmann , Wolfgang Vollrath
- Applicant: Andreas Birkner , Michael Hofmann , Wolfgang Vollrath
- Applicant Address: DE Weilburg
- Assignee: Vistec Semiconductor Systems GmbH
- Current Assignee: Vistec Semiconductor Systems GmbH
- Current Assignee Address: DE Weilburg
- Agency: Houston Eliseeva, LLP
- Priority: DE102007013646 20070319; DE102007024525 20070524
- Main IPC: G01N21/00
- IPC: G01N21/00 ; G06K9/62

Abstract:
A device for evaluating defects in the edge area of a wafer (6) is disclosed. The evaluation may also be performed automatically. In particular, the device includes three cameras (25, 26, 27), each provided with an objective (30), wherein a first camera (25) is arranged such that the first camera (25) is opposite to an edge area on the upper surface (6a) of the wafer (6), wherein a second camera (26) is arranged such that the second camera (26) is opposite to a front surface (6b) of the wafer (6), and wherein a third camera (27) is arranged such that the third camera (27) is opposite to an edge area on the lower surface (6c) of the wafer (6).
Public/Granted literature
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