Invention Grant
- Patent Title: Semiconductor integrated circuit and design method for semiconductor integrated circuit
- Patent Title (中): 半导体集成电路半导体集成电路及其设计方法
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Application No.: US11979483Application Date: 2007-11-05
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Publication No.: US07992118B2Publication Date: 2011-08-02
- Inventor: Takahiro Nagatani , Mitsuhiro Imaizumi
- Applicant: Takahiro Nagatani , Mitsuhiro Imaizumi
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: McDermott Will & Emery LLP
- Priority: JP2006-331553 20061208
- Main IPC: G06F17/50
- IPC: G06F17/50 ; G06F7/38 ; H03K19/177 ; H01L25/00 ; H03K19/173

Abstract:
The semiconductor integrated circuit of the invention includes: two first power supply lines placed in parallel in a same interconnect layer; a second power supply line placed between the two first power supply lines in the same interconnect layer; an actual operation flipflop connected to one of the two first power supply lines and the second power supply line and having a first clock terminal; and a dummy flipflop connected to the other first power supply line and the second power supply line and having a second clock terminal. The dummy flipflop includes: a contact connected to the other first power supply line or the second power supply line; and an interconnect for connecting the second clock terminal with the contact.
Public/Granted literature
- US20080141186A1 Semiconductor integrated circuit and design method for semiconductor integrated circuit Public/Granted day:2008-06-12
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