Invention Grant
- Patent Title: Link level retry scheme
- Patent Title (中): 链路级重试方案
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Application No.: US11326982Application Date: 2006-01-06
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Publication No.: US07991875B2Publication Date: 2011-08-02
- Inventor: Ching-Tsun Chou , Suresh Chittor , Andalib Khan , Akhilesh Kumar , Phanindra K. Mannava , Rajee S. Ram , Sujoy Sen , Srinand Venkatesan , Kiran Padwekar
- Applicant: Ching-Tsun Chou , Suresh Chittor , Andalib Khan , Akhilesh Kumar , Phanindra K. Mannava , Rajee S. Ram , Sujoy Sen , Srinand Venkatesan , Kiran Padwekar
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Kacvinsky Daisak PLLC
- Main IPC: G06F15/173
- IPC: G06F15/173 ; G06F15/16 ; G06F11/00 ; G01R31/08 ; H04L1/00 ; H04L12/56 ; H04L12/28 ; H04L1/18 ; H04J3/24
Abstract:
A link layer system is provided. The link layer system a first link layer control module and a retry queue for storing a transmitted data packet. The retry control module is coupled to the first link layer control module, which directs the retry queue to discard the transmitted data packet when an acknowledgment bit is received by the first link layer control module.
Public/Granted literature
- US20070130353A1 Link level retry scheme Public/Granted day:2007-06-07
Information query
