Invention Grant
- Patent Title: Clock buffer
- Patent Title (中): 时钟缓冲
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Application No.: US13017436Application Date: 2011-01-31
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Publication No.: US07990188B2Publication Date: 2011-08-02
- Inventor: Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
- Applicant: Robert F. Payne , Marco Corsi , Tien-Ling Hsieh
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John J. Patti; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03B1/00
- IPC: H03B1/00

Abstract:
An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT differential pair having a third BJT and a fourth BJT, a first clamp having a fifth BJT and a sixth BJT, and a second clamp having a seventh BJT and an eighth BJT. The collector and base of the third BJT are respectively coupled to the collector and base of the first BJT, and the collector and base of the fourth BJT are respectively coupled to the collector and base of the second BJT. The bases of first, second, third, and fourth BJTs receive an input clock signal. The emitters of the fifth and sixth BJTs are coupled to the collectors of the first and third BJTs, while the emitters of the seventh and eight BJTs are coupled to the collectors of the second and fourth BJTs. The bases of the fifth and seventh BJT are adapted to receive a low clamping voltage, and the bases of the sixth and eighth BJTs are adapted to receive a high clamping voltage. Additionally, the first and second clamps is coupled to the collectors of the first, second, third, and fourth BJTs.
Public/Granted literature
- US20110121868A1 CLOCK BUFFER Public/Granted day:2011-05-26
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