Invention Grant
- Patent Title: Transistor circuit formation substrate
- Patent Title (中): 晶体管电路形成衬底
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Application No.: US12076187Application Date: 2008-03-14
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Publication No.: US07989963B2Publication Date: 2011-08-02
- Inventor: Simon Tam
- Applicant: Simon Tam
- Applicant Address: JP Tokyo
- Assignee: Seiko Epson Corporation
- Current Assignee: Seiko Epson Corporation
- Current Assignee Address: JP Tokyo
- Agency: Oliff & Berridge, PLC
- Priority: GB0705132.9 20070316
- Main IPC: H01L23/48
- IPC: H01L23/48

Abstract:
A specially designed mask controls the arrangement of conductive materials that form a source and drain of a transistor. Designing the mask can be costly and time-consuming, which means that the testing of a circuit involving a transistor can also be costly, time consuming and a barrier towards efficient circuit development and testing. Accordingly, the present invention provides a pre-fabricated, general-purpose pattern comprising an array of conductive islands. The pattern is used as a source and a drain terminal for the formation of a thin-film transistor and as a conductive source for the formation of other electrical components upon the array.
Public/Granted literature
- US20080224332A1 Transistor circuit formation substrate and method of manufacturing transistor Public/Granted day:2008-09-18
Information query
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