Invention Grant
US07989867B2 Semiconductor memory device having a semiconductor layer disposed between first and second gate electrodes
有权
具有设置在第一和第二栅电极之间的半导体层的半导体存储器件
- Patent Title: Semiconductor memory device having a semiconductor layer disposed between first and second gate electrodes
- Patent Title (中): 具有设置在第一和第二栅电极之间的半导体层的半导体存储器件
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Application No.: US12285258Application Date: 2008-10-01
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Publication No.: US07989867B2Publication Date: 2011-08-02
- Inventor: Mizuki Ono
- Applicant: Mizuki Ono
- Applicant Address: JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JPP2004-293172 20041006
- Main IPC: H01L29/76
- IPC: H01L29/76
Abstract:
A semiconductor memory device includes a semiconductor substrate, a semiconductor layer, a source/drain layer, first and second insulating films, and first and second gate electrodes. The semiconductor layer of one conductivity type is formed on a principal surface of the semiconductor substrate. The source/drain layer is formed on the principal surface with being in contact with one end of the semiconductor layer, and has a conductivity type opposite to the one conductivity type. The first insulating film is formed on one side surface of the semiconductor layer. The second insulating film is formed on another side surface of the semiconductor layer. The first gate electrode is formed on the one side surface via the first insulating film. The second gate electrode is formed on the other side surface of the semiconductor layer via the second insulating film, and is opposed to the first gate electrode.
Public/Granted literature
- US20090050877A1 Semiconductor memory device Public/Granted day:2009-02-26
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