Invention Grant
- Patent Title: Semiconductor device having a hetero-junction bipolar transistor and manufacturing method thereof
- Patent Title (中): 具有异质结双极晶体管的半导体器件及其制造方法
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Application No.: US12126395Application Date: 2008-05-23
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Publication No.: US07989845B2Publication Date: 2011-08-02
- Inventor: Keiichi Murayama , Akiyoshi Tamura , Hirotaka Miyamoto , Kenichi Miyajima
- Applicant: Keiichi Murayama , Akiyoshi Tamura , Hirotaka Miyamoto , Kenichi Miyajima
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: Greenblum & Bernstein, P.L.C.
- Priority: JP2007-148638 20070604
- Main IPC: H01L31/0328
- IPC: H01L31/0328

Abstract:
The object of the present invention is to provide a semiconductor device and the manufacturing method thereof which are capable of preventing decrease in the collector breakdown voltage and reducing the collector resistance. The semiconductor device according to the present invention includes: a HBT formed on a first region of a semiconductor substrate; and an HFET formed on a second region of the semiconductor substrate, wherein the HBT includes: an emitter layer of a first conductivity; a base layer of a second conductivity that has a band gap smaller than that of the emitter layer; a collector layer of the first conductivity or a non-doped collector layer; and a sub-collector layer of the first conductivity which are formed sequentially on the first region, and the HFET includes an electron donor layer including a part of the emitter layer, and a channel layer formed under the electron donor layer.
Public/Granted literature
- US20080296624A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Public/Granted day:2008-12-04
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