Invention Grant
US07975209B2 Non-volatile memory with guided simulated annealing error correction control
有权
具有引导模拟退火误差校正控制的非易失性存储器
- Patent Title: Non-volatile memory with guided simulated annealing error correction control
- Patent Title (中): 具有引导模拟退火误差校正控制的非易失性存储器
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Application No.: US11694950Application Date: 2007-03-31
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Publication No.: US07975209B2Publication Date: 2011-07-05
- Inventor: Henry Chin , Nima Mokhlesi
- Applicant: Henry Chin , Nima Mokhlesi
- Applicant Address: US TX Plano
- Assignee: SanDisk Technologies Inc.
- Current Assignee: SanDisk Technologies Inc.
- Current Assignee Address: US TX Plano
- Agency: Vierra Magen Marcus & DeNiro LLP
- Main IPC: H03M13/00
- IPC: H03M13/00

Abstract:
Data in non-volatile storage is decoded using iterative probabilistic decoding. An error correcting code such as a low density parity check code may be used. In one approach, initial reliability metrics, such as logarithmic likelihood ratios, are used in decoding sensed states of a set of non-volatile storage elements. The decoding attempts to converge by adjusting the reliability metrics for bits in code words which represent the sensed state. Simulated annealing using an adjustable temperature parameter based on a level of error in the data can be performed to. The simulated annealing can introduce randomness, as noise for example, into the decoding process. Moreover, knowledge of the device characteristics can be used to guide the simulated annealing process rather than introducing absolute randomness. The introduction of a degree of randomness adds flexibility that permits possible faster convergence times and convergence in situations where data may otherwise be uncorrectable.
Public/Granted literature
- US20080244367A1 NON-VOLATILE MEMORY WITH GUIDED SIMULATED ANNEALING ERROR CORRECTION CONTROL Public/Granted day:2008-10-02
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