Invention Grant
US07975090B2 Method for efficient I/O controller processor interconnect coupling supporting push-pull DMA read operations 失效
支持推挽DMA读取操作的高效I / O控制器处理器互连耦合方法

Method for efficient I/O controller processor interconnect coupling supporting push-pull DMA read operations
Abstract:
A system for I/O controller-processor interconnect coupling supporting a push-pull DMA read operation, in one aspect, may comprise a processor interconnect comprising a plurality of caches and memory subsystems and an I/O controller coupled with the processor interconnect. The I/O controller may comprise a plurality of DMA read request queues, a DMA read slot pool comprising a plurality of DMA read slots, and an expander logic determining a priority of requests in said request queues.
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