Invention Grant
- Patent Title: Resistance variable memory device reducing word line voltage
- Patent Title (中): 电阻可变存储器件减少字线电压
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Application No.: US12903279Application Date: 2010-10-13
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Publication No.: US07974118B2Publication Date: 2011-07-05
- Inventor: Byung-Gil Choi , Du-Eung Kim
- Applicant: Byung-Gil Choi , Du-Eung Kim
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2006-0033305 20060412; KR10-2008-0009214 20080129
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
A resistance variable memory device includes a memory cell array, a sense amplifier circuit, and a column selection circuit. The memory cell array includes a plurality of block units and a plurality of word line drivers, where each of the block units is connected between adjacent word line drivers and includes a plurality of memory blocks. The sense amplifier circuit includes a plurality of sense amplifier units, where each of the sense amplifier units provides a read current to a corresponding block unit and includes a plurality of sense amplifiers. The column selection circuit is connected between the memory cell array and the sense amplifier circuit and selects at least one of the plurality of memory blocks in response to a column selection signal to apply the read current from the sense amplifier circuit to the selected memory block.
Public/Granted literature
- US20110026306A1 RESISTANCE VARIABLE MEMORY DEVICE REDUCING WORD LINE VOLTAGE Public/Granted day:2011-02-03
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