Invention Grant
US07973681B2 High speed, low power non-return-to-zero/return-to-zero output driver
有权
高速,低功耗非归零/归零输出驱动器
- Patent Title: High speed, low power non-return-to-zero/return-to-zero output driver
- Patent Title (中): 高速,低功耗非归零/归零输出驱动器
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Application No.: US12567841Application Date: 2009-09-28
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Publication No.: US07973681B2Publication Date: 2011-07-05
- Inventor: Adesh Garg , Afshin Momtaz , Namik Kocaman , Delong Cui
- Applicant: Adesh Garg , Afshin Momtaz , Namik Kocaman , Delong Cui
- Applicant Address: US CA Irvine
- Assignee: Broadcom Corporation
- Current Assignee: Broadcom Corporation
- Current Assignee Address: US CA Irvine
- Agency: Garlick Harrison & Markison
- Main IPC: H03M7/12
- IPC: H03M7/12

Abstract:
A gating logic receives a non-return-to-zero (NRZ) input signal and couples the NRZ input signal as an NRZ output signal when operating in a NRZ mode of operation and converts the NRZ input signal to a return-to-zero (RZ) output signal when operating in a RZ mode of operation. A circuit coupled to the gating logic receives a clock signal and couples the clock signal to the gating logic to convert the NRZ input signal to the RZ output signal in the RZ mode of operation. In the NRZ mode of operation, the circuit decouples the clock signal and places a predetermined signal state at the gating logic to pass through the NRZ input signal as the NRZ output signal. The circuit receives a select signal to select between the NRZ and RZ modes of operation and the NRZ and RZ modes are obtained by controlling the clock signal to the gating logic.
Public/Granted literature
- US20110074610A1 High Speed, Low Power Non-Return-To-Zero/Return-To-Zero Output Driver Public/Granted day:2011-03-31
Information query
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