Invention Grant
US07958467B2 Deterministic system and method for generating wiring layouts for integrated circuits 有权
用于生成集成电路布线布局的确定性系统和方法

  • Patent Title: Deterministic system and method for generating wiring layouts for integrated circuits
  • Patent Title (中): 用于生成集成电路布线布局的确定性系统和方法
  • Application No.: US11840050
    Application Date: 2007-08-16
  • Publication No.: US07958467B2
    Publication Date: 2011-06-07
  • Inventor: C. Trevor Bowen
  • Applicant: C. Trevor Bowen
  • Applicant Address: US AL Huntsville
  • Assignee: Adtran, Inc.
  • Current Assignee: Adtran, Inc.
  • Current Assignee Address: US AL Huntsville
  • Agency: Lanier Ford Shaver & Payne P.C.
  • Agent Jon E. Holland
  • Main IPC: G06F17/50
  • IPC: G06F17/50
Deterministic system and method for generating wiring layouts for integrated circuits
Abstract:
The present disclosure generally pertains to automatic wiring systems and methods for generating wiring layouts for integrated circuits. In one exemplary embodiment, a wiring router ensures that the wiring for multiple device segments is matched. That is, the wiring router defines the wiring paths such that the same or substantially similar localized metal patterns exist around each of the device segments. Thus, when an integrated circuit (IC) chip is manufactured according to the wiring layout, the IC chip should be less susceptible to the effects of process variations.
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