Invention Grant
- Patent Title: Method and circuit arrangement for calibration of a sampling control signal which influences the sampling time of a received signal from a sampling phase selection element
- Patent Title (中): 用于校准影响来自采样相位选择元件的接收信号的采样时间的采样控制信号的方法和电路装置
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Application No.: US10898047Application Date: 2004-07-23
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Publication No.: US07957455B2Publication Date: 2011-06-07
- Inventor: Steffen Paul , Thomas Ruprich , Dietmar Wenzel
- Applicant: Steffen Paul , Thomas Ruprich , Dietmar Wenzel
- Applicant Address: DE Neubiberg
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Neubiberg
- Agency: Eschweiler & Associates, LLC
- Priority: DE10334064 20030725
- Main IPC: H04B1/00
- IPC: H04B1/00

Abstract:
A discrete sampling control signal, which influences the sampling time, from a sampling phase selection element is calibrated by definition of quantization intervals for a sampling time error signal. For this purpose, a received signal is shifted through a series of time shifts τi in the signal path upstream of the sampling phase selection element. The sampling time errors ei associated with the respective time shifts τi are measured. The quantization steps of the sampling control signal that are suitable for the sampling phase selection element are then determined from the relationship obtained between τi and ei.
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