A reference buffer circuit provides a reference voltage at an output node and comprises a closed-loop branch comprising an amplifier and first and second MOS transistors and an open-loop branch comprising a third MOS transistor. A positive input terminal of the amplifier receives an input voltage. A gate of the first MOS transistor is coupled to the output terminal of the amplifier, and a source is coupled to a negative input terminal of the amplifier. A gate of the second MOS transistor is coupled to the drain of the first MOS transistor, a source is coupled to a first voltage source, and a drain is coupled to the source of the first MOS transistor. A gate of the third MOS transistor is coupled to the output terminal of the amplifier, and a source is coupled to the output node.