Invention Grant
- Patent Title: Multilayer printed wiring board and manufacturing method thereof
- Patent Title (中): 多层印刷电路板及其制造方法
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Application No.: US11910560Application Date: 2007-04-02
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Publication No.: US07956293B2Publication Date: 2011-06-07
- Inventor: Fumio Echigo , Shogo Hirai , Tadashi Nakamura
- Applicant: Fumio Echigo , Shogo Hirai , Tadashi Nakamura
- Applicant Address: JP Osaka
- Assignee: Panasonic Corporation
- Current Assignee: Panasonic Corporation
- Current Assignee Address: JP Osaka
- Agency: RatnerPrestia
- Priority: JP2006-101749 20060403; JP2006-101750 20060403
- International Application: PCT/JP2007/057394 WO 20070402
- International Announcement: WO2007/116855 WO 20071018
- Main IPC: H05K1/11
- IPC: H05K1/11

Abstract:
A multilayer printed wiring board is characterized in that the interlayer connection material in the via holes has a lower coefficient of thermal expansion in the thickness direction than the electrically insulating substrate made of insulating material; the interlayer connection is formed at a temperature higher than the operating temperature; and the interlayer connection material is larger in thickness than the interlayer connection material of the same wiring layer at normal temperature. This causes a difference in the coefficient of thermal expansion between the different materials in the thickness direction of the printed wiring board in the environment in which it is used resulting in high connection reliability.
Public/Granted literature
- US20090139761A1 MULTILAYER PRINTED WIRING BOARD AND MANUFACTURING METHOD THEREOF Public/Granted day:2009-06-04
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