Invention Grant
- Patent Title: Simplified phase lock loop control model system and method
- Patent Title (中): 简化锁相环控制模型系统及方法
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Application No.: US11590078Application Date: 2006-10-30
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Publication No.: US07948327B1Publication Date: 2011-05-24
- Inventor: Shuliang Li
- Applicant: Shuliang Li
- Applicant Address: US CA San Jose
- Assignee: Cypress Semiconductor Corporation
- Current Assignee: Cypress Semiconductor Corporation
- Current Assignee Address: US CA San Jose
- Main IPC: H03B29/00
- IPC: H03B29/00

Abstract:
A phase-locked loop control system and method are described. Present invention phase-locked loop control systems and methods facilitate control of phase-lock loop operations. In one embodiment, phase-lock loop control systems and methods are utilized in the implementation of a modulated frequency synthesizer for facilitating efficient frequency spreading over a designated spectrum. It is appreciated that present invention embodiments can have a variety of implementations and can be compatible with vector accumulation. For example, a phase-locked loop control system or method can facilitate generation of a variety of modulation patterns, including but not necessarily limited to linear or non-linear modulation, standard or non-standard modulation, etc.
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