Invention Grant
US07947563B2 Chip ID applying method suitable for use in semiconductor integrated circuit
失效
适用于半导体集成电路的芯片ID应用方法
- Patent Title: Chip ID applying method suitable for use in semiconductor integrated circuit
- Patent Title (中): 适用于半导体集成电路的芯片ID应用方法
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Application No.: US11704285Application Date: 2007-02-09
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Publication No.: US07947563B2Publication Date: 2011-05-24
- Inventor: Shigenari Aoki
- Applicant: Shigenari Aoki
- Applicant Address: JP Tokyo
- Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee: Oki Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Volentine & Whitt, P.L.L.C.
- Priority: JP2006-033703 20060210; JP2006-174797 20060626
- Main IPC: H01L21/76
- IPC: H01L21/76

Abstract:
A chip forming position specifying method for applying chip IDs indicative of positions on a wafer where semiconductor chips are formed, and thereby specifying their positions. In the chip forming position specifying method, different marks are formed for every chip in a transfer mask (hereinafter called “mark forming mask”) used to form a wiring layer, in addition to normal functional wirings. The positions of the chips on the wafer are respectively specified according to combinations of the marks of a plurality of the mark forming masks, which have been transferred onto the wafer.
Public/Granted literature
- US20070202664A1 Chip ID applying method suitable for use in semiconductor integrated circuit Public/Granted day:2007-08-30
Information query
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