An embodiment of the present invention provides a design specification to provide both design and manufacture security without increasing the chip area or reducing the chip performance. The invention employs “free” encryption and uses flash memory or anti-fuse technology for the security implementation. This secure methodology could be embedded into any RTL synthesis tool, or be created in a stand-alone tool. For a RTL netlist, some registers are selected as the candidates for the “secure cells”, and all “secure cells” must have only one output. A random key will be generated (we call it the “real key”) to decide whether each register is to be inverted or not. All “secure cells” will be mapped to the special registers in the technology library.