The invention describes in detail a solid-state CMOS image sensor, specifically the CMOS image sensor pixel that has only two row lines per pixel, pinned photodiode for sensing light, and one or two column lines. The pixel does not have an address transistor and the sensing and reset transistors are both MOS p-channel type. This architecture results in a low noise operation with a very small output transistor random noise. In addition this new pixel architecture allows for the standard CDS signal processing operation, which reduces the pixel to pixel non-uniformities and minimizes kTC reset noise. The pixel has high sensitivity, high conversion gain, high response uniformity, and low noise, which is enabled by the efficient 3T pixel layout.