A computing system capable of parallelizing the operation of multiple graphics processing units (GPUs) supported on an integrated graphic device (IGD) embodied within a bridge circuit, and employing a multi-mode parallel graphics rendering subsystem having software and hardware implemented components. The computing system includes (i) CPU memory space for storing one or more graphics-based applications, (ii) one or more CPUs for executing the graphics-based applications, (iii) an external graphics card supporting at least one GPU and being connected to the bridge circuit by way of a data communication interface, (iv) a multi-mode parallel graphics rendering subsystem supporting multiple modes of parallel operation, (v) a plurality of graphic processing pipelines (GPPLs), implemented using the GPUs, and (vi) an automatic mode control module. During the run-time of the graphics-based application, the automatic mode control module automatically controls the mode of parallel operation of the multi-mode parallel graphics rendering subsystem so that the multiple GPUs on the external graphics cards are driven in a parallelized manner, or the single GPU in the IGD is controlled during display operations, as the case may be.