Invention Grant
US07939891B2 Semiconductor device having MISFETs and manufacturing method thereof
有权
具有MISFET的半导体器件及其制造方法
- Patent Title: Semiconductor device having MISFETs and manufacturing method thereof
- Patent Title (中): 具有MISFET的半导体器件及其制造方法
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Application No.: US12409092Application Date: 2009-03-23
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Publication No.: US07939891B2Publication Date: 2011-05-10
- Inventor: Kouji Matsuo , Katsunori Yahashi , Takashi Shinyama
- Applicant: Kouji Matsuo , Katsunori Yahashi , Takashi Shinyama
- Applicant Address: JP Tokyo JP Tokyo
- Assignee: Kabushiki Kaisha Toshiba,Sony Corporation
- Current Assignee: Kabushiki Kaisha Toshiba,Sony Corporation
- Current Assignee Address: JP Tokyo JP Tokyo
- Agency: Finnegan, Henderson, Farabow, Garrett & Dunner, L.L.P.
- Priority: JP2008-102631 20080410
- Main IPC: H01L27/12
- IPC: H01L27/12

Abstract:
A semiconductor device includes a dielectric film and gate electrode that are stacked on a substrate, sidewalls formed to cover the side surfaces of the electrode and dielectric film, and SiGe films formed to sandwich the sidewalls, electrode and dielectric film, filled in portions separated from the sidewalls, having upper portions higher than the surface of the substrate and having silicide layers formed on regions of exposed from the substrate. The lower portion of the SiGe film that faces the electrode is formed to extend in a direction perpendicular to the surface of the substrate and the upper portion is inclined and separated farther apart from the gate electrode as the upper portion is separated away from the surface of the substrate. The surface of the silicide layer of the SiGe film that faces the gate electrode is higher than the channel region.
Public/Granted literature
- US20090256178A1 SEMICONDUCTOR DEVICE HAVING MISFETS AND MANUFACTURING METHOD THEREOF Public/Granted day:2009-10-15
Information query
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