Invention Grant
- Patent Title: Reducing resistance in source and drain regions of FinFETs
- Patent Title (中): 降低FinFET源极和漏极区域的电阻
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Application No.: US11873156Application Date: 2007-10-16
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Publication No.: US07939889B2Publication Date: 2011-05-10
- Inventor: Chen-Hua Yu , Yu-Rung Hsu , Chen-Nan Yeh , Cheng-Hung Chang
- Applicant: Chen-Hua Yu , Yu-Rung Hsu , Chen-Nan Yeh , Cheng-Hung Chang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L27/01
- IPC: H01L27/01 ; H01L27/12 ; H01L31/0392

Abstract:
A semiconductor structure includes a semiconductor fin on a top surface of a substrate, wherein the semiconductor fin includes a middle section having a first width; and a first and a second end section connected to opposite ends of the middle section, wherein the first and the second end sections each comprises at least a top portion having a second width greater than the first width. The semiconductor structure further includes a gate dielectric layer on a top surface and sidewalls of the middle section of the semiconductor fin; and a gate electrode on the gate dielectric layer.
Public/Granted literature
- US20090095980A1 Reducing Resistance in Source and Drain Regions of FinFETs Public/Granted day:2009-04-16
Information query
IPC分类: