Invention Grant
US07939449B2 Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends
有权
形成包括小尺寸活性表面末端和较大尺寸的背侧端的混合导电通孔的方法
- Patent Title: Methods of forming hybrid conductive vias including small dimension active surface ends and larger dimension back side ends
- Patent Title (中): 形成包括小尺寸活性表面末端和较大尺寸的背侧端的混合导电通孔的方法
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Application No.: US12052418Application Date: 2008-06-03
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Publication No.: US07939449B2Publication Date: 2011-05-10
- Inventor: Chad A. Cobbley , Jonathon G. Greenwood
- Applicant: Chad A. Cobbley , Jonathon G. Greenwood
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: TraskBritt
- Main IPC: H01L21/311
- IPC: H01L21/311
Abstract:
A conductive via of a semiconductor device includes a relatively small diameter portion extending into an active surface of a fabrication substrate and a corresponding, relatively large diameter portion that extends into a back side of the fabrication substrate. This type of conductive via may be fabricated by forming the relatively small diameter portion before or during BEOL processing, while the large diameter portion of each conductive via may be fabricated after BEOL processing is complete. Electronic devices that include one or more semiconductor devices with such conductive vias are also disclosed.
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