Invention Grant
- Patent Title: Method for fabricating semiconductor device with vertical gate
- Patent Title (中): 用于制造具有垂直栅极的半导体器件的方法
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Application No.: US12493174Application Date: 2009-06-27
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Publication No.: US07939411B2Publication Date: 2011-05-10
- Inventor: Young-Kyun Jung
- Applicant: Young-Kyun Jung
- Applicant Address: KR Gyeonggi-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Gyeonggi-do
- Agency: IP & T Group LLP
- Priority: KR10-2008-0113983 20081117
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method for fabricating a semiconductor device includes forming buried bit lines in a first substrate; forming a trench that separate the buried bit lines from each other; forming an interlayer insulation layer to gap-fill the trench; forming a second substrate over the first substrate gap-filled with the interlayer insulation layer; forming a protective pattern over the second substrate; forming a plurality of active pillars by etching the second substrate using the protective pattern as an etch barrier; and forming vertical gates surrounding sidewalls of the active pillars.
Public/Granted literature
- US20100124812A1 METHOD FOR FABRICATING SEMICONDUCTOR DEVICE WITH VERTICAL GATE Public/Granted day:2010-05-20
Information query
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