Invention Grant
- Patent Title: Multiple-depth STI trenches in integrated circuit fabrication
- Patent Title (中): 集成电路制造中的多深STI沟槽
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Application No.: US12057643Application Date: 2008-03-28
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Publication No.: US07939394B2Publication Date: 2011-05-10
- Inventor: Shubneesh Batra , Howard C. Kirsch , Gurtej S. Sandhu , Xianfeng Zhou , Chih-Chen Cho
- Applicant: Shubneesh Batra , Howard C. Kirsch , Gurtej S. Sandhu , Xianfeng Zhou , Chih-Chen Cho
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/8238

Abstract:
Multiple trench depths within an integrated circuit device are formed by first forming trenches in a substrate to a first depth, but of varying widths. Formation of a dielectric layer can cause some of the trenches to fill or close off while leaving other, wider trenches open. Removal of a portion of the dielectric material can then be tailored to expose a bottom of the open trenches while leaving remaining trenches filled. Removal of exposed portions of the underlying substrate can then be used to selectively deepen the open trenches, which can subsequently be filled. Such methods can be used to form trenches of varying depths without the need for subsequent masking.
Public/Granted literature
- US20080176378A1 MULTIPLE-DEPTH STI TRENCHES IN INTEGRATED CIRCUIT FABRICATION Public/Granted day:2008-07-24
Information query
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