Invention Grant
- Patent Title: Method for manufacturing thin film integrated circuit, and element substrate
- Patent Title (中): 薄膜集成电路和元件基板的制造方法
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Application No.: US12255117Application Date: 2008-10-21
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Publication No.: US07939385B2Publication Date: 2011-05-10
- Inventor: Yoshitaka Dozen , Tomoko Tamura , Takuya Tsurume , Koji Dairiki
- Applicant: Yoshitaka Dozen , Tomoko Tamura , Takuya Tsurume , Koji Dairiki
- Applicant Address: JP Atsugi-shi, Kanagawa-ken
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi, Kanagawa-ken
- Agency: Robinson Intellectual Property Law Office, P.C.
- Agent Eric J. Robinson
- Priority: JP2004-192250 20040629
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/46

Abstract:
Application form of and demand for an IC chip formed with a silicon wafer are expected to increase, and further reduction in cost is required. An object of the invention is to provide a structure of an IC chip and a process capable of producing at a lower cost. A feature of the invention is to use a metal film and a reactant having the metal film as a separation layer. An etching rate of the metal film or the reactant having metal is high, and a physical means in addition to a chemical means of etching the metal film or the reactant having metal can be used in the invention. Thus, the IDF chip can be manufactured more simply and easily in a short time.
Public/Granted literature
- US20090050964A1 METHOD FOR MANUFACTURING THIN FILM INTEGRATED CIRCUIT, AND ELEMENT SUBSTRATE Public/Granted day:2009-02-26
Information query
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