Invention Grant
- Patent Title: Memory array segmentation and methods
- Patent Title (中): 内存阵列分割和方法
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Application No.: US12614750Application Date: 2009-11-09
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Publication No.: US07903464B2Publication Date: 2011-03-08
- Inventor: Aaron Yip
- Applicant: Aaron Yip
- Applicant Address: US ID Boise
- Assignee: Micron Technologies, Inc.
- Current Assignee: Micron Technologies, Inc.
- Current Assignee Address: US ID Boise
- Agency: Leffert Jay & Polglaze, P.A.
- Main IPC: G11C16/04
- IPC: G11C16/04

Abstract:
An embodiment of a method includes applying a first voltage to a selected word line commonly coupled to portions of a row of memory cells respectively formed on first well regions of a plurality of first well regions of a first conductivity type formed in a second well region of a second conductivity type, at least one target memory cell coupled to the selected word line and formed on one of the first well regions, the first well regions electrically isolated from each other; applying a second voltage to unselected word lines, each unselected word line commonly coupled to portions of a row of memory cells not targeted for programming and respectively formed on the first well regions; and applying a third voltage to those first well regions that do not include the at least one target memory cell.
Public/Granted literature
- US20100061155A1 MEMORY ARRAY SEGMENTATION AND METHODS Public/Granted day:2010-03-11
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