Invention Grant
US07900022B2 Programmable processing unit with an input buffer and output buffer configured to exclusively exchange data with either a shared memory logic or a multiplier based upon a mode instruction
有权
可编程处理单元，具有输入缓冲器和输出缓冲器，其被配置为基于模式指令与共享存储器逻辑或乘法器专门交换数据
- Patent Title: Programmable processing unit with an input buffer and output buffer configured to exclusively exchange data with either a shared memory logic or a multiplier based upon a mode instruction
- Patent Title (中): 可编程处理单元，具有输入缓冲器和输出缓冲器，其被配置为基于模式指令与共享存储器逻辑或乘法器专门交换数据
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Application No.: US11354404Application Date: 2006-02-14
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Publication No.: US07900022B2Publication Date: 2011-03-01
- Inventor: Wajdi K. Feghali , William C. Hasenplaugh , Gilbert M. Wolrich , Daniel F. Cutter , Vinodh Gopal
- Applicant: Wajdi K. Feghali , William C. Hasenplaugh , Gilbert M. Wolrich , Daniel F. Cutter , Vinodh Gopal
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Grossman, Tucker, Perreault & Pfleger, PLLC
- Main IPC: G06F15/16
- IPC: G06F15/16
Abstract:
In general, in one aspect, a processing unit includes an input buffer to store data received by the processing unit, a memory, an arithmetic logic unit coupled to the input buffer and to the memory, an output buffer; and control logic having access to a control store of program instructions, the control logic to process instructions including an instruction to transfer data from the input buffer to the memory and an instruction to cause the arithmetic logic unit to perform an operation on operands provided by at least one of the memory and the input buffer, the instruction to output results of the operation to at least one of the memory and the output buffer.
Public/Granted literature
- US20070192547A1 Programmable processing unit Public/Granted day:2007-08-16
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