Invention Grant
US07886114B2 Storage controller for cache slot management 有权
存储控制器用于缓存槽管理

Storage controller for cache slot management
Abstract:
When a first channel processor from among a plurality of channel processors receives an I/O request from a host system, a second channel processor, which is to execute a part of the processing to respond to the I/O request, is selected from among the channel processors based on the LM directories of the respective channel processors. The selected second channel processor checks whether there is a cache hit. If there is a cache hit, it transfers the data from the cache memory to the buffer memory. The first channel processor then processes the I/O request using the data transferred to the buffer memory.
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