Invention Grant
US07885136B2 Semiconductor memory device having high stability and quality of readout operation 有权
具有高稳定性和读出操作质量的半导体存储器件

Semiconductor memory device having high stability and quality of readout operation
Abstract:
A semiconductor memory cell device includes a first multiplexer selecting a sub-block including a memory cell storing data to be read out in a row, a drain selector selecting a first column line connected to one terminal of the memory cell to be read, a precharge selector selecting a second column line connected to the other terminal of the memory cells adjacent to the one terminal of the memory cell storing the data to be readout, a second multiplexer selecting the sub-block including the second column line, a source selector selecting a third column line connected to the other terminal of the memory cell storing the data to be read out. The second multiplexer and precharge selector, when selecting, apply a first voltage to the second column line, and the source selector, when selecting, applies a second voltage to the third column line.
Information query
Patent Agency Ranking
0/0