Invention Grant
- Patent Title: Non-volatile phase-change memory device and method of reading the same
- Patent Title (中): 非易失性相变存储器件及其读取方法
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Application No.: US11316017Application Date: 2005-12-23
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Publication No.: US07885098B2Publication Date: 2011-02-08
- Inventor: Yu-Hwan Ro , Woo-Yeong Cho , Byung-Gil Choi
- Applicant: Yu-Hwan Ro , Woo-Yeong Cho , Byung-Gil Choi
- Applicant Address: KR Suwon-si, Gyeonggi-do
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Current Assignee Address: KR Suwon-si, Gyeonggi-do
- Agency: Volentine & Whitt, PLLC
- Priority: KR10-2005-0105964 20051107
- Main IPC: G11C11/00
- IPC: G11C11/00

Abstract:
In one aspect, a non-volatile semiconductor memory device includes a phase phase-change memory cell array including a plurality of word lines, a plurality of bit lines, and a plurality of phase-change memory cells, where each the phase-change memory cells includes a phase-change resistive element and a diode connected in series between a word line and a bit line among the plurality of word lines and bit lines of the phase-change memory cell array. The memory device of this aspect further includes a sense node which is selectively connected to a bit line of the phase-change memory cell array, a boosting circuit which generates a boosted voltage which is greater than an internal power supply voltage, a pre-charge and biasing circuit which is driven by the boosted voltage to pre-charge and bias the sense node, and a sense amplifier connected to the sense node. The boosted voltage may be equal to or greater than a sum of the internal power supply voltage and a threshold voltage of the diode of each phase-change memory cell.
Public/Granted literature
- US20070103972A1 Non-volatile phase-change memory device and method of reading the same Public/Granted day:2007-05-10
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