Invention Grant
US07885097B2 Non-volatile memory array with resistive sense element block erase and uni-directional write 有权
具有电阻感测元件块擦除和单向写入的非易失性存储器阵列

Non-volatile memory array with resistive sense element block erase and uni-directional write
Abstract:
In accordance with various embodiments, a column of non-volatile memory cells is connected between opposing first and second control lines. A fixed reference voltage is applied to the second control line. The memory cells are simultaneously programmed to a first resistive state by applying a first voltage to the first control line that is greater than the fixed reference voltage. Less than all of the memory cells are subsequently simultaneously programmed to a different, second resistive state by applying a second voltage to the first control line that is less than the fixed reference voltage, so that at the conclusion of the respective programming steps a first portion of the memory cells along said column are at the first resistive state and a second portion of the memory cells along said column are at the second resistive state.
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